In accordance with a photodetecting circuit described in Patent Document 1, there is disclosed that, in a device loading an electric current generated in a photodiode via an integrating circuit, the photodiode is driven to be zero-biased. When the photodiode is driven to be zero-biased, it is possible to reduce a dark current.
Patent Document 1: Japanese Unexamined Patent Application Publication No. 2003-315149
However, in the above-described conventional photodetecting circuit, when light with a high modulation frequency is made incident on the photodiode, an output therefrom oscillates. Further, when intense light such as direct sunlight from the sun is made incident thereon, an excess current is generated in proportion to the light, which may causes troubles in the circuit operation. The present invention has been achieved in consideration of the above-described problems, and an object of the present invention is to provide a photodetecting circuit which is capable of suppressing oscillation of an output, and operating as a zero bias circuit in a case of a small photoelectric current to an extent that a dark current is concerned about, and operating as a current limiter circuit in a case of a large photoelectric current to an extent that troubles are caused in the circuit operation.